Topic       : Pure Assembler Documentation
Author      : John Kormylo
Version     : PASM.HYP 1.0
Subject     : Documentation/Pure Assembler
Nodes       : 740
Index Size  : 20262
HCP-Version : 3
Compiled on : Atari
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@lang       : en
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View Ref-File[ 68881/2 Floating Point Co-processor ]

... uses eight 96 bit data registers (FPn), a 16 bit control register
(FPCR), a 32 bit status register (FPSR), and a 32 bit instruction
address register (FPIAR).

The FPU supports IEEE Single, Double, Extended and Packed BCD formats.
It converts any format to its own internal format whenever it accesses
RAM.

When the exponent has its max value and the mantissa is zero, that
number is interpreted as infinity.  If the mantissa is NOT zero, then
it is not a number (NAN).  A "Signalling NAN" is a NAN with the most
significant digit set (or the second most significant digit in
extended format).

NANs are generated when dividing zero by zero or infinity by infinity.
Signalling NANs are never generated by the FPU.

The FPU supports four rounding modes: round to nearest, round to zero,
round to minus infinity, and round to plus infinity.  These are set
by the FPCR.