Topic : Pure Assembler Documentation Author : John Kormylo Version : PASM.HYP 1.0 Subject : Documentation/Pure Assembler Nodes : 740 Index Size : 20262 HCP-Version : 3 Compiled on : Atari @charset : atarist @lang : en @default : @help : Help @options : +g -i -s +x +z -t4 @width : 75 View Ref-File A A0 A1 A2 A3 A4 A5 A6 A7 ABCD ABCD.B Accrued Exception Byte ACCset ACIA Control Register ACIA Status Register ACSI and FDC ADD ADD.L ADD.W ADDA ADDA.L ADDA.W ADDI ADDI.L ADDI.W ADDQ ADDQ.L ADDQ.W addr Address Registers Address Translation Cache Addressing ADDX ADDX.L ADDX.W ALIGN ALINE Alphabetical An AND AND.L AND.W ANDI ANDI to CCR ANDI to SR ANDI.L ANDI.W ASCII ASCIIL ASCIIZ ASL ASL.W ASR ASR.W Assembler Assembler Errors Atari Memory Map ATC auto_resident B Bcc BCC BCHG BCHG.B BCLR BCLR.B bconin_vec bconout_vec bconstat_vec bcostat_vec BCS bell_hook BEQ BFCHG BFCLR BFEXTS BFEXTU BFFFO BFINS BFSET BFTST BGE BGT BHI BKPT BLE Blitter Chip Blitter Control Register Blitter Halftone Operations Blitter Logical Operations Blitter Skew BLS BLT BMI BNE BPL BRA BSET BSET.B BSR BSS BTST BTST.B BVC BVS C CAAR Cache Cache Address Register Cache Control Register CACR call_TOS Calling CALLM CAS CAS2 CCR CHK CHK.W CHK2 CLR CLR.L CLR.W CMP CMP.L CMP.W CMP2 CMPA CMPA.L CMPA.W CMPI CMPI.L CMPI.W CMPM CODEC ADC Input CODEC Input Source colorptr COMM comments con_state Condition Code Byte Condition Code Register Condition Codes Configuration Switches Constants conterm Cookie Jar CPU Root Pointer CPUs: CRP D d(An) d(An,Rx) d(PC) d(PC,Rx) D0 D1 D2 D3 D4 D5 D6 D7 DATA Data Registers DBcc DBCC DBCS DBEQ DBF DBGE DBGT DBHI DBLE dble_vector_prod DBLS DBLT DBMI DBNE DBPL DBRA DBT DBVC DBVS DC DCB defshiftmod Dest Destination Function Code Device Drivers DFC Directives Disk Drivers DIVS DIVS.L DIVS.W DIVSL DIVU DIVU.L DIVU.W DIVUL DMA Crossbar Input Select DMA Crossbar Output Select DMA Interrupt Control Registe DMA Mode Control DMA Sound Chip DMA Sound Control DMA Sound Control Register DMA Status Dn Double DS DSP Command Vector Register DSP Expansion Port DSP Host Interface DSP Interrupt Control Registe DSP Interrupt Status Register DSP SSI DSP56001 E ELSE END ENDC ENDIF ENDM ENDMOD Enhanced Joystick Ports EOR EOR.L EOR.W EORI EORI to CCR EORI to SR EORI.L EORI.W EQU ERROR error Error: absolute Error: addressing mode Error: alignment Error: argument syntax Error: bad character Error: bad digit Error: bad label Error: bad operands Error: bad operator Error: bad size Error: close Error: comment Error: constant Error: create Error: directive Error: displacement Error: division by zero Error: immediate Error: include Error: index scale Error: index size Error: internal Error: invalid id Error: invalid option Error: label Error: line too big Error: list syntax Error: location counter Error: macro name Error: missing endif Error: missing endm Error: missing option Error: missing option argumen Error: missing source Error: multiple source Error: no if Error: no macro Error: no RAM Error: opcode Error: open Error: register list Error: relative Error: relocation Error: seek Error: segment Error: size Error: string Error: super Error: syntax Error: write etv_critic etv_term etv_timer EVEN Examples Exception Status Byte Exception Vectors Exceptions exec_os EXG EXITM EXPORT expression EXT EXTB Extended External Serial Input External Serial Output F FABS FACOS FADD Falcon Processor Control FASIN FATAN FATANH FBcc FBEQ FBF FBGE FBGL FBGLE FBGT FBLE FBLT FBNE FBNGE FBNGL FBNGT FBNLE FBNLT FBOGE FBOGT FBOLE FBOLT FBOR FBSEQ FBSF FBSNE FBST FBT FBUEQ FBUGE FBUGT FBULE FBULT FBUN FCMP FCOS FCOSH FDBcc FDBEQ FDBF FDBGE FDBGL FDBGLE FDBGT FDBLE FDBLT FDBNE FDBNGE FDBNGL FDBNGT FDBNLE FDBNLT FDBOGE FDBOGT FDBOLE FDBOLT FDBOR FDBSEQ FDBSF FDBSNE FDBST FDBT FDBUEQ FDBUGE FDBUGT FDBULE FDBULT FDBUN FDC Control Bytes FDIV FETOX FETOXM1 FGETEXP FGETMAN FINT FINTRZ Flags: FLINE Floating Point Control Regist Floating Point Data Registers Floating Point Instruction Ad Floating Point Status Registe flock FLOG10 FLOG2 FLOGN FLOGNP1 FMOD FMOVE FMOVE (Control Register) FMOVECR FMOVEM FMOVEM (Control Registers) FMUL FNEG FNOP force_media_change FP0 FP1 FP2 FP3 FP4 FP5 FP6 FP7 FPCR FPIAR FPn FPSR FPU FPU Condition Codes FREM Frequency Divider External Sy Frequency Divider Internal Sy FRESTORE FSAVE FSCALE FScc FSEQ FSF FSGE FSGL FSGLDIV FSGLE FSGLMUL FSGT FSIN FSINCOS FSINH FSLE FSLT FSNE FSNGE FSNGL FSNGT FSNLE FSNLT FSOGE FSOGT FSOLE FSOLT FSOR FSQRT FSSEQ FSSF FSSNE FSST FST FSUB FSUEQ FSUGE FSUGT FSULE FSULT FSUN FTAN FTANH FTENTOX FTRAPcc FTRAPEQ FTRAPF FTRAPGE FTRAPGL FTRAPGLE FTRAPGT FTRAPLE FTRAPLT FTRAPNE FTRAPNGE FTRAPNGL FTRAPNGT FTRAPNLE FTRAPNLT FTRAPOGE FTRAPOGT FTRAPOLE FTRAPOLT FTRAPOR FTRAPSEQ FTRAPSF FTRAPSNE FTRAPST FTRAPT FTRAPUEQ FTRAPUGE FTRAPUGT FTRAPULE FTRAPULT FTRAPUN FTST FTWOTOX Function Code Functions G GI Sound Chip GLOBL GPIO Data Direction H hdv_boot hdv_bpb hdv_mediach hdv_rw Help I I/O Ports IDE Error IDE Head IDE Port IDE Status IF IF1 IF2 IFB IFcc IFEQ IFF IFGE IFGT IFLE IFLT IFNB IFNE IKBD IKBD Absolute Mouse Position IKBD Absolute Mouse Position IKBD and MIDI Interface IKBD Controller Execute IKBD Joystick Event Report IKBD Joystick Keycode Mode IKBD Joystick Report IKBD Keycode Mouse Position R IKBD Load Mouse Position IKBD Memory Load IKBD Memory Read IKBD Mouse Button Action IKBD Mouse Scale IKBD Mouse Threshold IKBD Relative Mouse Position IKBD Reset IKBD Set Absolute Mouse Posit IKBD Set Fire Button Monitori IKBD Set Joystick Keycode Mod IKBD Set Joystick Monitoring IKBD Set Mouse Button Action IKBD Set Mouse Keycode Mode IKBD Set Mouse Scale IKBD Set Mouse Threshold IKBD Set Time of Day Clock IKBD Status Report IKBD Time of Day ILLEGAL IMPORT INCLUDE Instructions Interrupt Mask Interrupt Stack Pointer ISP J JMP JMP.L Joystick Joystick Masks JSR JSR.L K klc_hook L label LCOMM LEA LEA.L LINK LIST LMC1992 LOCAL LSL LSL.W LSR LSR.W M MACRO Macros Master Stack Pointer max.size MC146818A MC60020 MC68000 MC68010 MC68030 MC68040 MC6850 MC68851 MC68881 MC68nnn Mega FPU memcntlr Memory Controller MFP Interrupt Registers MFP Serial Registers MFP Timer Registers MK68901 MODULE MOVE MOVE from CCR MOVE from SR MOVE from SR Time MOVE from USP MOVE to CCR MOVE to CCR Time MOVE to SR MOVE to SR Time MOVE to USP MOVE.L MOVE.W MOVE16 MOVEA MOVEC MOVEM MOVEM.L MOVEM.W MOVEP MOVEQ MOVES MSP MULS MULS.L MULS.W multiply_by_constant MULU MULU.L MULU.W N NBCD NBCD.B NCR5380 NEG NEG.L NEG.W NEGX NEGX.L NEGX.W NOLIST NOP NOT NOT.L NOT.W O OFFSET OPERR: Optimization OR OR.L OR.W ORG ORI ORI to CCR ORI to SR ORI.L ORI.W Overview P PACK Packed BCD PAGE palmode PBAC PBAS PBBC PBBS PBcc PBGC PBGS PBIC PBIS PBLC PBLS PBSC PBSS PBWC PBWS PC PDBAC PDBAS PDBBC PDBBS PDBcc PDBGC PDBGS PDBIC PDBIS PDBLC PDBLS PDBSC PDBSS PDBWC PDBWS PEA PEA.L Peripherals PFLUSH PFLUSHA PFLUSHR PFLUSHS PLOAD PLOADR PLOADW PMMU PMMU Condition Codes PMMU Status Register PMOVE PMOVEFD PRESTORE PRINT printer_driver Privileged Program Counter prv_aux prv_auxo prv_lst prv_lsto PSAC PSAS PSAVE PSBC PSBS PScc PSGC PSGS PSIC PSIS PSLC PSLS PSR PSSC PSSS PSWC PSWS PTEST PTESTR PTESTW PTRAPAC PTRAPAS PTRAPBC PTRAPBS PTRAPcc PTRAPGC PTRAPGS PTRAPIC PTRAPIS PTRAPLC PTRAPLS PTRAPSC PTRAPSS PTRAPWC PTRAPWS pun_ptr Pure C Linkage PVALID Q Quotient Byte R Real Time Clock Record Attenuation Record Gain Record Tracks Select REG Registers REPT RESET resvalid resvector ROL ROL.W ROR ROR.W ROXL ROXL.W ROXR ROXR.W RSR RTC Register A RTC Register B RTC Register C RTC Register D RTD RTE RTM RTR RTS S sav_context save_row SBCD SBCD.B Scan Codes Scc SCC SCC Baud Rate Generator SCC Buffer Status SCC Clock Mode SCC Command SCC DMA Control SCC External Status Interrupt SCC Interrupt Enable SCC Interrupt Vector SCC Master Interrupt Control SCC Misc. Control Bits SCC Misc. Status Bits SCC Misc. Transmit and Receiv SCC Read Registers SCC Receive Parameters SCC Special Receive Condition SCC Transmit and Receive Para SCC Transmit Parameters SCC Write Registers scr_dump Screen Dump screenpt SCS SCSI Bus Status Register SCSI Bus/Status Register SCSI Controller SCSI Data Register SCSI DMA Control SCSI DMA Initiator Receive SCSI DMA Send Register SCSI DMA Target Receive SCSI ID Register SCSI Initiator Command Regist SCSI Input Data Register SCSI Mode Register SCSI Phases SCSI Reset Parity/Interrupt SCSI Signals SCSI Target Command Register seekrate SEQ Serial Communications Control SET SF SF.B SFC SGE SGT SHI Single size modifier Sizes: SLE SLS SLT SMI SNE Sound Mode Control Sound Track Control Source Source Function Code SP SPL SR SRP sshiftmd SSP ST ST Color Palette ST Compatible Image ST Functional ST General Purpose Interrupt ST MFP ST MFP Interrupt Registers ST Privileged ST RAM ST Shift Mode ST Sync Mode ST.B Stack Pointer Statements Status Register STE Joystick Directions STE Joystick Fire Buttons STOP SUB SUB.L SUB.W SUBA SUBA.L SUBA.W SUBI SUBI.L SUBI.W SUBQ SUBQ.L SUBQ.W SUBX SUBX.L SUBX.W SUPER Supervisor Mode Supervisor Root Pointer Supervisor Stack Pointer SVC SVS SWAP System Control Unit System Variables System Variables by Address System Variables by Name T TAS TAS.B TC TEXT Translation Control Transparent Translation TRAP TRAPcc TRAPCC TRAPCS TRAPEQ TRAPF TRAPGE TRAPGT TRAPHI TRAPLE TRAPLS TRAPLT TRAPMI TRAPNE TRAPPL TRAPT TRAPV TRAPVC TRAPVS TSR TST TST.L TST.W TT Floating Point TT Functional TT General Purpose Interrupt TT MFP TT MFP Interrupt Registers TT Palette TT Privileged TT RAM TT Shift Mode TT0 TT1 TTL Tversion U UCR UNLK UNPK USER User Stack Pointer USP V Vblank VBR Vector Base Register Video Address Counter Video Base Video Controller VMEbus W WD1772 WD1772 Command Register WD1772 Status Register X XBRA XBRA Protocol XDEF XREF Y YM2149 YM2149 Register 7 Z Z8530 * #data ([b,An,Rx],d) ([b,An],Rx,d) ([b,PC,Rx],d) ([b,PC],Rx,d) (An) (An)+ * *= -(An) = _bufl _drvbits _hz_200 _longframe _nflops _p_cookies _prt_cnt _sysbase _timr_ms _v_bas_ad