Topic       : Pure Assembler Documentation
Author      : John Kormylo
Version     : PASM.HYP 1.0
Subject     : Documentation/Pure Assembler
Nodes       : 740
Index Size  : 20262
HCP-Version : 3
Compiled on : Atari
@charset    : atarist
@lang       : en
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@help       : Help
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View Ref-File[ Status Register ]

The leftmost byte of the status register is used to control the
operation of the CPU.  Accessing the left byte of the status register
is a Privileged operation.

The rightmost byte contains the bit flags used by the Bcc instruction
(see Condition Codes) and can be accessed separately starting with the
68020.  Each instruction affects these flags differently.

Bit  |15|14|13|12|11|10| 9| 8| 7| 6| 5| 4| 3| 2| 1| 0|
-----+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
Flag |T1|T0| S| M|  |  Mask  |        | X| N| Z| V| C|

T1   Trace Mode; causes an exception after next instruction.
T0   Causes an exception on the next branch, jump, or return.  68020+
S    Supervisor Mode
M    Use MSP for stack pointer (S bit must be set).  68020+
Mask Interrupt Mask

X    Extend bit.
N    Negative (sign) flag.
Z    Zero flag.
V    Overflow flag.
C    Carry bit.

See also Condition Code Register, FPSR and PSR.