Topic : Pure Assembler Documentation Author : John Kormylo Version : PASM.HYP 1.0 Subject : Documentation/Pure Assembler Nodes : 740 Index Size : 20262 HCP-Version : 3 Compiled on : Atari @charset : atarist @lang : en @default : @help : Help @options : +g -i -s +x +z -t4 @width : 75 View Ref-File[ Z8530 Serial Communications Controller -- TT, Falcon & STE -- ] ... provides 2 serial channels. SCC A is used for either Serial 2 or the LAN port. SCC B is used for Modem 2. The chip has 16 write registers and 9 read registers for each channel. Registers 0 and 8 are directly accessible. The other registers must be selected using WR0, which lasts for one access only. The SCC can use asynchronous formats, synchronous byte formats, and synchronous bit formats such as HDLC and SDLC using the SYNC pin (pin 9 on Serial 2). The SCC has a built in checksum generator, and a 3 byte receiver FIFO buffer. It can operate in loop mode, where received data is automatically transmitted on. See also SCC Write Registers, SCC Read Registers and SCC Baud Rate Generator. XBIOS: Iorec, Rsconf and Bconmap.