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Topic       : Pure Assembler Documentation
Author      : John Kormylo
Version     : PASM.HYP 1.0
Subject     : Documentation/Pure Assembler
Nodes       : 740
Index Size  : 20262
HCP-Version : 3
Compiled on : Atari
@charset    : atarist
@lang       : en
@default    : 
@help       : Help
@options    : +g -i -s +x +z -t4
@width      : 75
View Ref-File[ MK68901 Multi Function Peripheral ]

The MFPs are used to produce all I/O interrupts, provide interrupt
timers, and drive a serial port (Modem 1 and Serial 1 on the TT).
Each register has its own memory address (see ST MFP and TT MFP).

  MFP Interrupt Registers
  MFP Timer Registers
  MFP Serial Registers

Up to 8 interrupt request lines can be connected, corresponding to the
bits of the GPIP register.  These, along with the timers and serial
port, correspond to 16 possible interrupts which can be individually
disabled, etc.

As part of the interrupt acknowledge cycle of the CPU, the MFP sends
an 8 bit Interrupt Vector Offset which in included in the exception
stack frame.  This is used by the operating system to determine what
device needs servicing.  Bits 0-3 contain the interrupt number 0-15
where 0 corresponds to bit 0 of IERB and 15 corresponds to bit 7 of
IERA.  Bits 4-7 are used to identify which MFP sent the interrupt.

The timers operate by counting down from a given starting value.
When they reach zero they send an interrupt request and reset the
counter.  Normally they decrement after some preset number of clock
cycles.  Timer C is used to provide the 200 Hz system clock.  Timer D
has its output pin connected to the clock pins of the MFP serial
interface and is used as the Baud rate generator (interrupt disabled).

Timers A and B can also be driven by a external signal.  In event
count mode they simply decrement on each pulse.  In pulse delay mode
they start counting clock cycles when the pulse starts.  Timer B
is connected to the horizontal sync signal and is used in event count
mode.  Timer A is connected to the DMA Sound Chip (frame completed
signal) on the STE & TT.

The serial interface can operate in either synchronous or asynchronous
mode.  In asynchronous mode, each character is preceded by start bit
and followed by 1-2 stop bits.  In synchronous mode, a synchronizing
character is continuously being transmitted so that there is no idle
time between frames.

XBIOS: Rsconf, Jdisint, Jenabint and Xbtimer.