Topic : Pure Assembler Documentation Author : John Kormylo Version : PASM.HYP 1.0 Subject : Documentation/Pure Assembler Nodes : 740 Index Size : 20262 HCP-Version : 3 Compiled on : Atari @charset : atarist @lang : en @default : @help : Help @options : +g -i -s +x +z -t4 @width : 75 View Ref-File[ Exceptions ] ... are generated by I/O interrupts, errors, and certain instructions (such as TRAP). There are 255 possible types of exceptions, and each one has an associated jump vector stored in memory locations $00 through $3FF (4 bytes each). (On CPUs: 1234 these vectors are addressed relative to the VBR register.) The I/O interrupt cycle reads a vector number from the peripheral requesting the interrupt. Exception vectors 64 to 255 are reserved for peripheral interrupts. If no vector is returned, the CPU uses the autovector for that interrupt level. When an exception occurs, the status register, program counter, vector offset (CPUs: 1234), and possibly other info are pushed onto the SSP or ISP stack. (These are restored by the RTE instruction.) The status register is set to supervisor mode and interrupts are disabled. The PC is loaded from the corresponding jump vector and execution continues from there. These vectors can be reset using BIOS Setexc function. When the RESET button is pushed, the Trace and Master bits are cleared and the Supervisor and Interrupt Mask bits are set, the VBR is cleared and the caches are disabled, the ISP is loaded from memory address $00 (vector 0) and the PC is loaded from memory address $04 (vector 1). On the Atari addresses $00-$07 are implemented on ROM. See also Exception Vectors and XBRA Protocol.