Topic       : CTPCI Documentation
Author      : Sascha Uhlig (Editor)
Version     : CTPCI.hyp (5/12/2010)
Subject     : Expansion Card
Nodes       : 135
Index Size  : 3892
HCP-Version : 5
Compiled on : Atari
@charset    : atarist
@lang       : 
@default    : Title Page
@help       : Help Page
@options    : -i +zz
@width      : 70
View Ref-File5.2  Updating the CPLDs of the CT60/63 and CTPCI                 CTPCI

The CT60/63 and the CTPCI use CPLDs. A CPLD, Complex Programmable 
Logic Device, is a programmable logic chip with complexity between 
that of PALs and FPGAs, and architectural features of both. Like an 
FPGA, Field-Programmable Gate Array, it is designed to be configured 
by the customer or designer after manufacturing. Thus possible bugs 
that may be still in the hardware - for the CPLDs of the CT60/63, 
like preventing using the CTPCI - can be fixed without much hassle; 
also an update to a newer version can provide improved performance.

A special configuration file, known as a JEDEC file, is used to 
(re)configure a CPLD. This ASCII file is fed to a software suite from 
the CPLD vendor that is used to program the CPLD via a JTAG 
interface. JTAG, Joint Test Action Group, is the group that initiated 
the standardisation of this serial interface to download, read back 
and verify design configuration data.

The CT60/63 uses two logic chips: the ABE (Atari Bus Emulation) that 
links the 68060 with the Falcon CPU bus and the SDR that acts as the 
SDRAM controller. The CPLD of the CTPCI has several tasks. It acts 
among other things as local and PCI bus arbiter, interrupt and IDE 
controller, and local bus interface.

To update the CPLDs of the CT60/63 (two Xilinx XC95144XL) and the 
CTPCI (Xilinx XC95288XL), you can contact Rodolphe Czuba or obtain a 
JTAG download cable for Xilinx's CPLDs and FPGAs and configure the 
chips via a Falcon or a PC.


 5.2.1  JTAG Download Cables and Connecting
 5.2.2  CPLD Update via Falcon
 5.2.3  CPLD Update via PC