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Topic       : MC68030 - Instruction Assembler Syntax
Author      : Bjørn Ove Årthun/Jiri Kucik
Version     : mc68030.hyp 0.01 (29/02/96)
Subject     : Programming/Others
Nodes       : 120
Index Size  : 2440
HCP-Version : 2
Compiled on : Atari
@charset    : atarist
@lang       : 
@default    : 
@help       : %main
@options    : +g -i -s +z
@width      : 75
View Ref-FileAbout&author  Author of the HYPertext

+--------------------------------------------------------------------------+
|Mnemonic   |Description              |Mnemonic |Description               |
+--------------------------------------------------------------------------+
|ABCD       |Add Decimal with Extend  |MULS     |Signed Multiply
|ADD        |Add                      |MULU     |Unsigned Multiply
|ADDA       |Add Address              |---------|---------------------------
|ADDI       |Add Immediate            |NBCD     |Negate Decimal with Extend
|ADDQ       |Add Quick                |NEG      |Negate
|ADDX       |Add with Extend          |NEGX     |Negate with Extend
|AND        |Logical AND              |NOP      |No Operation
|ANDI       |Logical AND Immediate    |NOT      |Logical Complement
|ASL, ASR   |Arithmetic Shift L/R     |---------|---------------------------
|-----------|                         |OR       |Logical inclusive Or
|Bcc        |Branch Conditionally     |ORI      |Logical inclusive Immediate
|BCHG       |Test Bit and change      |---------|---------------------------
|BFCLR      |Test Bit Field and Clr   |PACK     |Pack BCD
|BFEXTS     |Signed Bit Field Extract |PEA      |Push Effective Address
|BFEXTU     |Unsigned -----||-----    |---------|---------------------------
|BFFFO      |Bit Field Find First One |RESET    |Reset External Devices
|BFINS      |Bit Field Insert         |ROL, ROR |Rotate Left and Right
|BFSET      |Test Bit Field and Set   |ROXL,ROXR|Rotate with Extend
|BFTST      |Test Bit Field           |RTD      |Return and Deallocate
|BKPT       |Breakpoint               |RTE      |Return from Exception
|BRA        |Branch                   |RTM      |Return from Module
|BSET       |Test Bit and Set         |RTR      |Return from Restore Codes
|BSR        |Branch to Subroutine     |RTS      |Return from Subroutine
|BTST       |Test Bit                 |---------|---------------------------
|-----------|                         |SBCD     |Subtr. Decimal with Extend
|CALLM      |Call Module              |Scc      |Set Conditionally
|CAS        |Compare and Swap Operands|STOP     |Stop
|CAS2       |As above in Dual Mode    |SUB      |Subtract
|CHK        |Check Reg: Against Bound |SUBA     |Subtract Address
|CHK2       |Check Against Upper and  |SUBI     |Subtract Immediate
|           |Lower Bounds             |SUBQ     |Subtract Quick
|CLR        |Clear                    |SUBX     |Subtract with Extend
|CMP        |Compare                  |SWAP     |Swap Register words
|CMPA       |Compare Address          |---------|---------------------------
|CMPI       |Compare Immediate        |TAS      |Test Operand and Set
|CMPM       |Compare Memory to Memory |TRAP     |Trap
|CMP2       |Compare Register Against |TRAPcc   |Trap Conditionally
|           |Upper and Lower Bounds   |TRAPV    |Trap on Overflow
|-----------|                         |TST      |Test Operand
|DBcc       |Test Condition, Decrement|---------|---------------------------
|           |and Branch               |UNLK     |Unlink
|DIVS, DIVSL|Signed Divide            |UNPK     |Unpack
|DIVU, DIVUL|Unsigned Divide          |-------------------------------------
|-----------|                         |      CoProcessor Instructions
|EOR        |Exclusive Or             |-------------------------------------
|EORI       |Exclusive Or Immediate   |cpBcc    |Branch Conditionally
|EXG        |Exchange Registers       |cpDBcc   |Test Condition,
|EXT, EXTB  |Signed Extend            |         |Decrement and Branch
|-----------|                         |cpGEN    |Coprocessor General Instr.
|ILLEGAL    |Take Illegal Instruction |cpRESTORE|Restore Internal State
|           |Trap                     |cpSAVE   |Save Internal State
|-----------|                         |cpScc    |Set Conditionally
|JMP        |Jump                     |cpTRAPcc |Trap Conditionally
|JSR        |Jump to Subroutine       |---------+---------------------------
|-----------|                         | Unofficial Instructions
|LEA        |Load Effective Address   |-------------------------------------
|LINK       |Link and Allocate        |         |
|LSL, LSR   |Logical Shift Left and   |         |Not complete. :)
|           |Right                    |         |
|-----------|                         |         |
|MOVE       |Move                     |         |
|MOVEA      |Move Address             |         |
|MOVE CCR   |Move Condition Code Reg. |         |
|MOVE SR    |Move Status Register     |         |
|MOVE USP   |Move User Stack Pointer  |         |
|MOVEC      |Move Control Register    |         |
|MOVEM      |Move Multiple            |         |
|MOVEP      |Move Peripheral          |         |
|MOVEQ      |Move Quick               |         |
|MOVES      |Move Alternate Address   |         |
|           |Space                    |         |
+---------------------------------------------------------------------------
| Dual Mode: 64 bit processing intructions eg. Muls.l d0,d1:d2
|            The Destination Operand is in 64 bit format
+---------------------------------------------------------------------------
| Addressing Modes and Assembler Syntax
+---------------------------------------------------------------------------
| Instruction Cycles table
+---------------------------------------------------------------------------
| Optimizations
+---------------------------------------------------------------------------