MC56001 Documentation
Instruction Set
ABS
ADC
ADD
ADDL
ADDR
AND
ANDI
ASL
ASR
BCHG
BCLR
BSET
BTST
CLR
CMP
CMPM
DIV
DO
ENDDO
EOR
ILLEGAL
Jcc
JCLR
JMP
JScc
JSCLR
JSET
JSR
JSSET
LSL
LSR
LUA
MAC
MACR
MOVE
I
R
U
X:
X:R
Y:
R:Y
L:
X:Y
MOVEC
MOVEM
MOVEP
MPY
MPYR
NEG
NOP
NORM
NOT
OR
ORI
REP
RESET
RND
ROL
ROR
RTI
RTS
SBC
STOP
SUB
SUBL
SUBR
SWI
Tcc
TFR
TST
WAIT
Registers
Address Registers
Offset Registers
Modifier Registers
Data ALU Input Registers
Data ALU Accumulator Registers
Status Register
Mode Register
Condition Code Register
Operating Mode Register
Loop Address Register
Loop Counter Register
System Stack
Stack Pointer Register
SP Register Values
Program Counter
%SSII
Synchronous Serial Interface
SSI Control Register A
Prescale Modulus Select
Frame Rate Divider Control
Word Length Control
Prescaler Range
SSI Control Register B
Serial Output Flag 0
Serial Output Flag 1
Serial Control 0 Direction
Serial Control 1 Direction
Serial Control 2 Direction
Clock Source Direction
Shift Direction
Frame Sync Length
Gated Clock Control
SSI Mode Select
SSI Transmit Enable
SSI Receive Enable
SSI Transmit Interrupt Enable
SSI Receive Interrupt Enable
SSI Status Register
Serial Input Flag 0
Serial Input Flag 1
Transmit Frame Sync Flag
Receive Frame Sync Flag
Transmitter Underrun Error Flag
Receive Overrun Error Flag
SSI Transmit Data Register Empty
SSI Receive Data Register Full
SSI Receive Shift Register
SSI Receive Data Register
SSI Transmit Shift Register
SSI Transmit Data Register
SSI Time Slot Register
%HostI
Port B
Host Interface
Host Control Register
Host Receive Interrupt Enable
Host Transmit Interrupt Enable
Host Command Interrupt Enable
Host Flag 2
Host Flag 3
Host Status Register
Host Receive Data Full
Host Transmit Data Empty
Host Command Pending
Host Flag 0
Host Flag 1
DMA Status
Host Receive Data Register
Host Transmit Data Register
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