Topic       : MC56001 Documentation
Author      : JAY Software
Version     : 1.0 (19/11/1997)
Subject     : Programming/Assembler
Nodes       : 152
Index Size  : 4106
HCP-Version : 4
Compiled on : Atari
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View Ref-FileJScc                        Jump to Subroutine Conditionally

Operation:                                          Assembler Syntax:
    If cc, then SP+1->SP;PC->SSH;SR->SSL;0xxx->PC       JScc    xxx
        else PC+1->PC

    If cc, then SP+1->SP;PC->SSH;SR->SSL;ea->PC         JScc    ea
        else PC+1->PC

Description:
    Jump to subroutine whose location in program memory is given by
the instruction's effective address if the specified condition is true.
If the specified condition is true, the address of the instruction
immediately following the JScc instruction (PC) and SR are pushed onto
the system stack. Program execution then continues at the specified
effective address in program memory. If the specified condition is
false, the PC is incremented, and any extension word is ignored.
However, the address register specified in the effective address field
is always updated independently of the specified condition. All memory
alterable addressing mods may be used for the effective address. A
fast short jump addressing mode may also be used? The 12-bit data
is zero extended to form the effective address. The term "cc" may
specify the following condition:

    "cc" Mnemonic                               Condition
    CC (HS) - carry clear (higher or same)      C = 0
    CS (LO) - carry set (lower)                 C = 1
    EC      - extension clear                   E = 0
    EQ      - equal                             Z = 1
    ES      - extension set                     E = 1
    GE      - greater than or equal             N^V = 0
    GT      - greater than                      Z+(N^V) = 0
    LC      - limit clear                       L = 0
    LE      - less than or equal                Z+(N^V) = 1
    LS      - limit set                         L = 1
    LT      - less than                         N^V = 1
    MI      - minus                             N = 1
    NE      - not equal                         Z = 0
    NR      - normalized                        Z+(~U & ~E) = 1
    PL      - plus                              N = 0
    NN      - not normalized                    Z+(~U & ~E) = 0

    where
    ~ denote the logical complement,
    + denotes the logical OR operator,
    & denotes the logical AND operator, and
    ^ denotes the logical Exclusive OR operator.

Restrictions:
    A JScc instruction used within a DO loop cannot specify the loop
address (LA) as its target.

    A JScc instruction used within in a DO loop cannot begin at the address
LA within that DO loop.

    A JScc instruction cannot be repeated using the REP instruction.

Example:
    JSLS    (R3+N3) ;jump to subroutine at P:(R3+N3) if limit set (L=1)

Explanation of Example:
    In this example, program execution is transfered tothe subroutine
at address P:(R3+N3) in program memory if the limit bit is set (L=1).
Both the return address (PC) and SR are pushed onto the system stack
prior to transferring program control to the subroutine if the
specified condition is not true, no jump is taken and the PC is
incremented by 1.

Condition Codes:
    The condition codes are not affected by this instruction.

Instruction Format:
    JScc    xxx
    JScc    ea

    xxx = 12-bit Short Jump Address

    ea = (Rn)-Nn
         (Rn)+Nn
         (Rn)-
         (Rn)+
         (Rn)
         (Rn+Nn)
         -(Rn)
         Absolute address

Timing:     4 + jx oscillator clock cycles

Memory:     1 + ea program words