Topic       : Documentation of the CT60
Author      : Didier MEQUIGNON
Version     : Version 2.00 (December 11, 2010)
Subject     : Documentation
Nodes       : 135
Index Size  : 3664
HCP-Version : 3
Compiled on : Atari
@charset    : atarist
@lang       : 
@default    : 
@help       : 
@options    : -i
@width      : 75
View Ref-File10.9  INTERRUPTS                                                  CT60

CT60 adds some new interrupts for the 060 Bus Slot, re-routing of the
Falcon INT Set to the second CPU (CPU#2 on the Bus Slot).

 The /I6 , and /INT were added on CT60. 

/I6 is the interrupt from the 060 BUS SLOT and is merged with the
others from the Falcon. See table below for the priority position.

/INT is sent by SDR-60 to the CPU#2 to interrupt it. INT is
synthetized from the /IPL2, /IPL1 & /IPL0 signals and the I6. It is
necessary when the CPU#2 has to respond the interrupts instead of the
primary 060...

 060 INTERRUPTS PRIORITY TABLE 


  NAME    LEVEL  ACTIVE  TYPE      SOURCE            IVR    PRIORITY 
  I6        6    Low     Software  CT60 Bus Slot     1,1,1  Highest 
  INT6      6    Low     Software  F030 Bus Slot     1,1,0     ^ 
  MFPINT    6    Low     Software  F030 MFP          1,1,0     | 
  DSPREQ    6    Low     Software  F030 DSP          1,1,0     | 
  INT5      5    Low     Software  F030 SCC          1,0,1     | 
  VBL       4    Low     Auto      F030 VIDEL VSync  1,0,0     | 
  INT3      3    High    Software  F030 Bus Slot     0,1,1     | 
  HBL       2    Low     Auto      F030 VIDEL HSync  0,1,0     v 
  INT1      1    High    Software  F030 Bus Slot     0,0,1   Lowest 


 INT1 & INT3 are NO MORE SUPPORTED with CT60 ! 

INT6 is also named MFPINT on atari documents because it is daisy
chained with the MFP.

To allow the PPC to read the level of the falcon re-routed
interrupts, the CT60 furnishes a register called (B!) IVR (Interrupt
Vector Register).  The IVR column gives you the binary values encoded
by the SDR60 chip...

Note that the INT6, MFPINT and DSPREQ Interrupts are chained on the
level 6 line... (its a stock Falcon feature !).

It is planned that the PPC board will contain a mechanism register to
generate a '68K like' INT ACK cycle and receive the software Vector
from the Falcon data bus. On CT60, the IVR contains only the level of
the pending INT...

 CPU#2 INTERRUPT 


           NAME  LEVEL  ACTIVE  TYPE  SOURCE 
           INT   None   Low     Auto  F030 IPLx and CT60 I6 


This interrupt is compatible with the PowerPC INT...