Topic       : MC56001 Documentation
Author      : JAY Software
Version     : 1.0 (19/11/1997)
Subject     : Programming/Assembler
Nodes       : 152
Index Size  : 4106
HCP-Version : 4
Compiled on : Atari
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View Ref-FileEOR                     Logical Exclusif OR

Operation:
    S ^ D[47:24]->D[47:24]  (parallel move)
    where ^ denotes the logical exclusive OR operator

Assembler Syntax:
    EOR S,D             (parallel move)

Description:
    Logically exclusive OR the source operand S with bits 47-24 of the
destination operand D and store the result in bits 47-24 of the
destination accumulator. This instruction is 24-bit operation. The
remaining bits of the destination operand D are not affected.

Example:
    EOR Y1,B    (R2)+       ;Exclusive OR Y1 with B1, update R2

    Before Execution:
        Y1 = $000003
        B  = $00:000005:000000

    After Execution:
        Y1 = $000003
        B  = $00:000006:000000

Explanation of Example:
    Prior to execution, the 24-bit Y1 register contains the value
$000003, and the 56-bit B accumulator contains the value
$00:000005:000000. The EOR Y1,B instruction logically exclusive ORs
the 24-bit value in the Y1 register with bits 47-24 of the B
accumulator (B1) and stores the result in the B accumulator with bits
55-48 and 23-0 unchanged.

Condition Codes:

     15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |LF|**| T|**|S1|S0|I1|I0|**| L| E| U| N| Z| V| C|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |<-           MR         ->|<-       CCR      ->|

    L- Set if data limiting has occured during parallel move
    N- Set if bit 47 of A or B result is set
    Z- Set if bits 47-24 of A or B result are zero
    V- Always cleared

Instruction Format:
    EOR S,D

    S = (X0,X1,Y0,Y1)
    D = (A,B)

Timing:     2 + mv oscillator

Memory:     1 + mv program words