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Topic       : MC56001 Documentation
Author      : JAY Software
Version     : 1.0 (19/11/1997)
Subject     : Programming/Assembler
Nodes       : 152
Index Size  : 4106
HCP-Version : 4
Compiled on : Atari
@charset    : atarist
@lang       : 
@default    : 
@help       : 
@options    : -i +y +z -t4
@width      : 100
View Ref-FileCMP                     Compare

Operation:
    S2 - S1             (parallel move)

Assembler Syntax:
    CMP S1,S2           (parallel move)

Description:
    Subtract the source one operand, S1, from the source two
accumulator, S2, and update the condition code register. The result of
the substraction operation isnot stored.

NOTE: This instruction substracts 56-bit operands. When a word is
specified as S1, it is sign extended and zero filled to form a valid
56-bit operand. For the carry to be set correctly as a result of the
substraction, S2 must be properly sign extended. S2 can be improperly
sign extended by writing A1 or B1 explicity prior to executing the
compare so that A2 or B2, respectively, may not represent the correct
sign extension. This note particularly applies to the case where it is
extended to compare 24-bit operands such as X0 with A1.

Example:
    CMP Y0,B    X0,X:(R6)+N6    Y1,Y:(R0)-  ;comp. Y0 and B, save X0,Y1

    Before Execution:
        B  = $00:000020:000000
        Y0 = $000024
        SR = $0300

    After Execution:
        B  = $00:000020:000000
        Y0 = $000024
        SR = $0319

Explanation of Example:
    Prior to execution, the 56-bit B accumulator contains the value
$00:000020:000000 and the 24-bit Y0 register contains the value
$000024. The execution of the CMP Y0,B instruction automatically
appends the 24-bit value in the Y0 register with 24 LS zeros, sign
extends the resulting 48-bit long word to 56 bits, substracts the
result from the 56-bit B accumulator and updates the condition code
register.

Condition Codes:

     15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |LF|**| T|**|S1|S0|I1|I0|**| L| E| U| N| Z| V| C|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |<-           MR         ->|<-       CCR      ->|

    L- Set if limiting (parallel move) or overflow has occured in result
    E- Set if the signed integer portion of result is in use
    U- Set if result is unnormlized
    N- Set if bit 55 of result is set
    Z- Set if result equals zero
    V- Set if overflow has occured in result
    C- Set if a carry (or borrow) occurs from bit 55 of result

NOTE: The definition of the E and U bits varies according
to the scaling mode being used.

Instruction Format:
    CMP S1,S2

    S1 = (A,B,X0,Y0,X1,Y1)
    S2 = (A,B)

Timing:     2 + mv oscillator clock cycles

Memory:     1 + mv program words