Topic       : MC56001 Documentation
Author      : JAY Software
Version     : 1.0 (19/11/1997)
Subject     : Programming/Assembler
Nodes       : 152
Index Size  : 4106
HCP-Version : 4
Compiled on : Atari
@charset    : atarist
@lang       : 
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@options    : -i +y +z -t4
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View Ref-FileASR                     Arithmetic Shift Accumulator Right

Operation:

        55 47     23   0
       +--+------+------+
    +->|->|----->|----->|--> C (parallel move)
    |  +--+------+------+
    +---+

Assembler Syntax:
    ASR D               (parallel move)

Description:
    Arithmetically shift the destination operand D one bit to the right
and store the result in the destination accumulator. The LS bit of D
prior to instruction execution is shifted into the carry bit C, and
the MS bit of D is held constant.

Example:
    ASR B   X:-(R3),R3      ;divide B by 2, update R3,load R3

    Before Execution:
        B  = $AB:A86420:A86421
        SR = $0300

    After Execution:
        B  = $D4:543210:543210
        SR = $0329

Explanation of Example:
    Prior to execution, the 56-bit B accumulator contains the value
$A8:A86420:A86420. The execution of the ASR B instruction shifts the
56-bit value in the B accumulator one bit to the right and restore
the result back in the B accumulator.

Condition Codes:

     15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |LF|**| T|**|S1|S0|I1|I0|**| L| E| U| N| Z| V| C|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |<-           MR         ->|<-       CCR      ->|

    L- Set if data limiting has occured during parallel move
    E- Set if the signed integer portion of A or B result is in use
    U- Set if A or B result is unnormalized
    N- Set if bit 55 of A or B result is set
    Z- Set if A or B result equals zero
    V- Always cleared
    C- Set if bit 0 of A or B was set prior to instruction execution

NOTE: The definition of the E and U bits varies according to the
scaling mode being used.

Instruction Format:
    ASR D

    D = (A,B)

Timing:     2 + mv oscillator clock cycles

Memory:     1 + mv program words