Topic       : MC56001 Documentation
Author      : JAY Software
Version     : 1.0 (19/11/1997)
Subject     : Programming/Assembler
Nodes       : 152
Index Size  : 4106
HCP-Version : 4
Compiled on : Atari
@charset    : atarist
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@options    : -i +y +z -t4
@width      : 100
View Ref-FileSerial Input Flag 1 (IF1) SSISR Bit 1:

   The SSI latches data present on the SC1 pin during reception of the
first received bit after frame sync is detected. The IF1 flag is updated
with the data when the receiver shift register is transfered into the
receive data register. The IF1 bit is enable only when SCD1 is cleared and
SYN is set, indicating that SC1 is an input and the synchronous mode is
selected; otherwise, IF1 reads as zero when it is not enabled. Hardware,
software, SSI individual, and STOP reset clear IF1.