Topic       : MC56001 Documentation
Author      : JAY Software
Version     : 1.0 (19/11/1997)
Subject     : Programming/Assembler
Nodes       : 152
Index Size  : 4106
HCP-Version : 4
Compiled on : Atari
@charset    : atarist
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@options    : -i +y +z -t4
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View Ref-FileSerial Input Flag 0 (IF0) SSISR Bit 0:

    The SSI latches data present on the SC0 pin during reception of the
first received bit after frame sync is detected. IF0 is updated with this
data when the receive shift register is transfered into the receive data
register. The IF0 bit is enabled only when SCD0 is cleared and SYN is set,
indicating that SC0 is an input and the synchronous mode is selected;
otherwise, IF0 reads as a zero whenit is not enabled. Hardware, software,
SSI individual, an STOP reset clear IF0.