Topic       : MC56001 Documentation
Author      : JAY Software
Version     : 1.0 (19/11/1997)
Subject     : Programming/Assembler
Nodes       : 152
Index Size  : 4106
HCP-Version : 4
Compiled on : Atari
@charset    : atarist
@lang       : 
@default    : 
@help       : 
@options    : -i +y +z -t4
@width      : 100
View Ref-FileClock Source Direction (SCKD) CRB Bit 5:

   SCKD selects the source of the clock signal used to clock the transmit
shift register in the asynchronous mode and both the transmit shift register
and the receive shift register in the synchronous mode. When SCKD is set,
the internal clock source becomes the bit clock for the transmit shift
register and word length divider and is the output on the SCK pin. When SCKD
is cleared, the clock source is external; the internal clock generator is
disconnected from the SCK pin, and an external clock source may drive this
pin. Hardware and software reset clear SCKD.