Topic       : Documentation of the CT60
Author      : Didier MEQUIGNON
Version     : Version 2.00 (December 11, 2010)
Subject     : Documentation
Nodes       : 135
Index Size  : 3664
HCP-Version : 3
Compiled on : Atari
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View Ref-File3.3.1  The ak-modul-bus module with a CY27EE16                    CT60

It's possible to add a programmable clock generator by step of 125
KHz on the CT60. The module use a CY27EE16 connected on the CT60
oscillator socket and two SDRAM module I2C signals SDA (82) and SLC
(83) found on R11 / R12.

Because the module need a DIL24 socket and the CT60 clock has a DIL14
socket, you can use some wires for connect the module to the CT60
like this :





 ATTENTION ! 

If you think you're not ready to solder two very fine wires on R11
and R12, return the CT60 and put the 2 wires on the pins 82 and 83 of
the SDRAM socket (front right). Rodolphe suggest to use the DIL14
socket by the pins 2 (SCL to the pin 83 of the SDRAM socket) and 3
(SDA to the pin 83 of the SDRAM socket) in order to remove easily the
clock module.







Reduce the wire CLK at the minimum size, the best is to put the top
of the module (pins 18 to 24) on the CT60 clock socket (pins 8 to 14)
with an extension connector. You must at minimum to cut the pins
21/23 on the module, otherwise there are a short circuit with the
CT60 CLK and the 3V3.


  +------------------------------------------+
  |                                        +5V 3V3   CLK      CLK
  |                                        14o__o__o__o__o__o__o
  |                 +------------------------------------------'8
 +5V   CLK6  CLK5  CLK4  GND   GND           |                 |
  o__o__o__o__o__o__o__o__o__o__o__o_____     )   CT60 clock   |
24| GND   GND   GND   GND   GND   GND    |   |      socket     |
  |                                 |o  o|  1|                 |7
  |                                 |o  o|   o--o--o--o--o--o--o
   )            Module              |o  o|           GND      GND
  |         with a CY27EE16         |o  o|                     |
  |                                 |o  o|                     |
 1| GND   GND   GND   GND   GND   GND    |                     |
  o--o--o--o--o--o--o--o--o--o--o--o-----                      |
+3V3   CLK1  CLK2  CLK3  SCL   SDA +---------------------------+
                         |     |
                         |     |
                         v     v
                        R12   R11 (or pin 82 of the SDRAM socket)
            (or pin 83 of the SDRAM socket)

 Synoptic 





   ∙ The programmable CT60 clock output is CLK1 or CLK4.

   ∙ CLK2 and CLK 3 are disabled.

   ∙ CLK5 and CLK6 can be used for a user clock, but there are always
     a link with the CT60 clock with a divider from 2 to 6, excepted
     for a frequency <= 66 MHz :


               CT60 clock (MHz)  CLK5/6 (MHz)  Divider 
                    50.000          25.000       /2 
                    66.000          33.000       /2 
                    66.600          16.650       /4 
                    66.000          33.000       /2 
                    99.000          33.000       /3 


The TOS check if the module exist and can change the clock between 50
and 110 MHz (see also the part 'Change the CT60 frequency').

Look at http://www.ak-modul-bus.de for more informations about this
module.

 Schematic 





 List of components : 

1 x CY27EE16FZEC.
1 x LM317LZ.
2 x Zener 4V7/500mW.
1 x Quartz 10 MHz.
1 x 180 ohms.
1 x 110 ohms.
2 x 4.7 Kohms.
3 x 100 nF.
1 x male connector HE10 (or HE14) 2x5.

1 x female connector HE10 2x5.
1 x flat cable 10 wires.
1 x female SUBD 9 pins.

 Remark :  For the frequency to 100 MHz, you must fix the CT60 clock
(look at 'CT60-100 clock').