Topic       : MC68030 - Instruction Assembler Syntax
Author      : Bjørn Ove Årthun/Jiri Kucik
Version     : mc68030.hyp 0.01 (29/02/96)
Subject     : Programming/Others
Nodes       : 120
Index Size  : 2440
HCP-Version : 2
Compiled on : Atari
@charset    : atarist
@lang       : 
@default    : 
@help       : %main
@options    : +g -i -s +z
@width      : 75
View Ref-FileNAME      ASL, ASR -- Arithmetic shift left and arithmetic shift right

SYNOPSIS  ASd       Dx,Dy
          ASd       #<data>,Dy
          ASd       <ea>
          where d is direction, L or R

          Size = Byte, Word, Long

FUNCTION  Performs an arithmetic shifting bit operation in the indicated
          direction, with an immediate data, or with a data register.
          If you shift address contents, you can only do ONE shift, and
          your operand is ONE word exclusively.

          ASL:              <--
                C <------ OPERAND <--- 0
                      |
                      |
                X <---'


          ASR:    -->
          .---> OPERAND ------> C
          |    T          |
          |    |          |
          `----'          `---> X

FORMAT    In the case of the shifting of a register:
          ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          +---------------------------------------------------------------+
          |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
          |---|---|---|---|-----------|---|-------|---|---|---|-----------|
          | 1 | 1 | 1 | 0 |  NUMBER/  |dr |  SIZE |i/r| 0 | 0 | REGISTER  |
          |   |   |   |   |  REGISTER |   |       |   |   |   |           |
          +---------------------------------------------------------------+

          In the case of the shifting of a memory area:
          ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          +---------------------------------------------------------------+
          |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
          |---|---|---|---|---|---|---|---|---|---|-----------|-----------|
          | 1 | 1 | 1 | 0 | 0 | 0 | 0 |dr | 1 | 1 |    MODE   | REGISTER  |
          +---------------------------------------========================+
                                                            <ea>

NUMBER/REGISTER
          Specifies number of shifting or number of register which contents
          the number of shifting.
          If i/r = 0, number of shifting is specified in the instruction as
          immediate data
          If i/r = 1, it's specified in the data register.
          If dr = 0, right shifting
          If dr = 1, left shifting

SIZE      00->one Byte operation
          01->one Word operation
          10->one Long operation

REGISTER  For a register shifting:
          Indicates the number of data register on which shifting is applied.

          For a memory shifting:
          <ea> indicates operand which should be shifted.
          Only addressing modes allowed are:
          +-------------------------------+ +-----------------------------+
          |Addressing Mode|Mode| Register | |Addressing Mode|Mode|Register|
          |-------------------------------| |-----------------------------|
          |      Dn       | -  |     -    | |    Abs.W      |111 |  000   |
          |-------------------------------| |-----------------------------|
          |      An       | -  |     -    | |    Abs.L      |111 |  001   |
          |-------------------------------| |-----------------------------|
          |     (An)      |010 |Nã reg. An| |   (d16,PC)    | -  |   -    |
          |-------------------------------| |-----------------------------|
          |     (An)+     |011 |Nã reg. An| |   (d8,PC,Xi)  | -  |   -    |
          |-------------------------------| |-----------------------------|
          |    -(An)      |100 |Nã reg. An| |   (bd,PC,Xi)  | -  |   -    |
          |-------------------------------| |-----------------------------|
          |    (d16,An)   |101 |Nã reg. An| |([bd,PC,Xi],od)| -  |   -    |
          |-------------------------------| |-----------------------------|
          |   (d8,An,Xi)  |110 |Nã reg. An| |([bd,PC],Xi,od)| -  |   -    |
          |-------------------------------| |-----------------------------|
          |   (bd,An,Xi)  |110 |Nã reg. An| |    #data      | -  |   -    |
          |-------------------------------| +-----------------------------+
          |([bd,An,Xi]od) |110 |Nã reg. An|
          |-------------------------------|
          |([bd,An],Xi,od)|110 |Nã reg. An|
          +-------------------------------+

RESULT    X - Set according to the list bit shifted out of the operand.
              Unaffected for a shift count of zero.
          N - Set if the most-significant bit of the result is set. Cleared
              otherwise.
          Z - Set if the result is zero. Cleared otherwise.
          V - Set if the most significant bit is changed at any time during
              the shift operation. Cleared otherwise.
          C - Set according to the list bit shifted out of the operand.
              Cleared for a shift count of zero.