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Topic       : MC56001 Documentation
Author      : JAY Software
Version     : 1.0 (19/11/1997)
Subject     : Programming/Assembler
Nodes       : 152
Index Size  : 4106
HCP-Version : 4
Compiled on : Atari
@charset    : atarist
@lang       : 
@default    : 
@help       : 
@options    : -i +y +z -t4
@width      : 100
View Ref-FileMOVEP                   Move Peripheral Data

Operation:                  Assembler Syntax:
    X:pp->D                     MOVEP   X:pp,D
    X:pp->X:ea                  MOVEP   X:pp,X:ea
    X:pp->Y:ea                  MOVEP   X:pp,Y:ea
    X:pp->P:ea                  MOVEP   X:pp,P:ea
    S->X:pp                     MOVEP   S,X:pp
    #xxxxxx->X:pp               MOVEP   #xxxxxx,X:pp
    X:ea->X:pp                  MOVEP   X:ea,X:pp
    Y:ea->X:pp                  MOVEP   Y:ea,X:pp
    P:ea->X:pp                  MOVEP   P:ea,X:pp
    Y:pp->D                     MOVEP   Y:pp,D
    Y:pp->X:ea                  MOVEP   Y:pp,X:ea
    Y:pp->Y:ea                  MOVEP   Y:pp,Y:ea
    Y:pp->P:ea                  MOVEP   Y:pp,P:ea
    S->Y:pp                     MOVEP   S,Y:pp
    #xxxxxx->Y:pp               MOVEP   #xxxxxx,Y:pp
    X:ea->Y:pp                  MOVEP   X:ea,Y:pp
    Y:ea->Y:pp                  MOVEP   Y:ea,Y:pp
    P:ea->Y:pp                  MOVEP   P:ea,Y:pp

Description:
    Move the specified operand from/to the specified X or Y I/O
peripheral. The I/O short addressing mode is used for the I/O
peripheral address. All memory addressing modes may be used for the X or
Y memory effective address.

    If the system stack register SSH is specified as a source operand, the
system stack pointer (SP) is postdecremented by 1 after SSH has been
read. If the system stack register SSH is specified as a destination
operand, the system stack pointer (SP) is preincremented by 1 before
SSH is written. This allows the system stack to be efficiently extended
using software stack pointer operations.

    When a 56-bit accumulator (A or B) is specified as a source operand S,
the accumulator value is optionally shifted according to the scaling
mode bits S0 and S1 in the system status register (SR). If the data out
of the shifter indicates that the accumulator extension register is in
use and the data is to be moved into a 24-bit destination, the value
stored in the destination is limited to a maximum positive or negative
saturation constant to minimize truncation error. If a 24-bit source
operand is to be moved into a 16-bit destination register D, the 8 MS
bits of the 24-bit source operand are discarded, and the 16 LS bits
are stored in the 16-bit destination register. Limiting does not occur
if an individual 24-bit accumulator register (A1,A0,B1, or B0) is
specified as a source operand instead of the full 56-bit accumulator
(A or B). This limiting feature allows block floating-point operations
to be performed with error detection since the L bit in the condition
code register is latched.

    When a 56-bit accumulator (A or B) is specified as a destination
operand D, any 24-bit source data to be moved into that accumulator is
automatically extended to 56 bits by sign extending the MS bit of the
source operand (bit 23) and appending the source operand with 24 LS
zeros. Whenever a 16-bit source operand S is to be moved into a 24-bit
destination, the 16-bit source is loaded into the LS 16 bits of the
destination operand, and the remaining 8 MS bits of the destination are
zeroed. Note that for 24-bit source operands both the automatic
sign-extension and zeroing features may be disabled by specifying the
destination register to be one of the individual 24-bit accumulator
register (A1 or B1).

NOTE: Due to pipelining, if an address register (R,N, or M) is
changed using a move-type instruction, the new contents of the
destination address register will not be available for use during the
following instruction (i.e., there is a single instruction cycle
pipeline delay).

Restrictions:

NOTE: The following restrictions represent very unusual operations,
which probably would never be used but are listed only for
completeness.

    A MOVEP instruction used within a DO loop which specifies SSH as the
source operand or LA, LC, SR, SP, SSH, or SSL as the destination
operand cannot begin at the address LA-2, LA-1, or LA within that DO
loop.

    A MOVEP instruction which specifies SSH as the source operand or LA,
LC, SSH, SSL, or SP as the destination operand cannot be used
immediately before a DO instruction.

    A MOVEP instruction which specifies SSH as the source operand or LA,
LC, SR, SSH, SSL, or SP as the destination operand cannot be used
immediately before an ENDDO instruction.

    A MOVEP instruction which specifies SSH as the source operand or SR,
SSH, SSL, or SP as the destination operand cannot be used immediately
before an RTI instruction.

    A MOVEP instruction which specifies SSH as the source operand or SSH,
SSL, or SP as the destination operand cannot be used immediately before
an RTS instruction.

    A MOVEP instruction which specifies SP as the destination operand
cannot be used immediately before a MOVEC, MOVEM, or MOVEP instruction
which specifies SSH or SSL as the source operand.

Example:
    MOVEP   #$1113,X:<<$FFFE ;initialize Bus Control Register wait states

    Before Execution:
        X:$FFFE (BCR) = $FFFF

    After Execution:
        X:$FFFE (BCR) = $1113

Explanation of Example:
    Prior to execution, the 16-bit, X memory-mapped, I/O bus control
register (BCR) contains the value $FFFF. The execution of the MOVEP
#$1113,X:<<$FFFE instruction moves the value $1113 into the 16-bit bus
control register X:$FFFE, resulting in one wait state for all external
X, external Y, and external program memory accesses and three wait
states for al external I/O accesses.

Condition Codes:

     15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |LF|**| T|**|S1|S0|I1|I0|**| L| E| U| N| Z| V| C|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |<-           MR         ->|<-       CCR      ->|

    For D = SR operand:
        L- Set according to bit 6 of the source operand
        E- Set according to bit 5 of the source operand
        U- Set according to bit 4 of the source operand
        N- Set according to bit 3 of the source operand
        Z- Set according to bit 2 of the source operand
        V- Set according to bit 1 of the source operand
        C- Set according to bit 0 of the source operand

    For D != SR operand:
        L- Set if data limiting has occured during move

Instruction Format:
    MOVEP   X:pp,D
    MOVEP   X:pp,X:ea
    MOVEP   X:pp,Y:ea
    MOVEP   X:pp,P:ea
    MOVEP   S,X:pp
    MOVEP   #xxxxxx,X:pp
    MOVEP   X:ea,X:pp
    MOVEP   Y:ea,X:pp
    MOVEP   P:ea,X:pp
    MOVEP   Y:pp,D
    MOVEP   Y:pp,X:ea
    MOVEP   Y:pp,Y:ea
    MOVEP   Y:pp,P:ea
    MOVEP   S,Y:pp
    MOVEP   #xxxxxx,Y:pp
    MOVEP   X:ea,Y:pp
    MOVEP   Y:ea,Y:pp
    MOVEP   P:ea,Y:pp

    #xxxxxx = Immediate Data

    pp = 6-bit I/O Short Address

    ea = (Rn)-Nn
         (Rn)+Nn
         (Rn)-
         (Rn)+
         (Rn)
         (Rn+Nn)
         -(Rn)
         Absolute address

    S = (X0,X1,Y0,Y1,A0,B0,A2,B2,A1,B1,A,B,Rn,Nn,Mn,SR,OMR,SP,SSH,
         SSL,LA,LC)
    D = (X0,X1,Y0,Y1,A0,B0,A2,B2,A1,B1,A,B,Rn,Nn,Mn,SR,OMR,SP,SSH,
         SSL,LA,LC)

Timing:     4 + mvp oscillator clock cycles

Memory:     1 + ea program words