Topic       : MC56001 Documentation
Author      : JAY Software
Version     : 1.0 (19/11/1997)
Subject     : Programming/Assembler
Nodes       : 152
Index Size  : 4106
HCP-Version : 4
Compiled on : Atari
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View Ref-FileMACR                        Signed Multiply-Accumulate and Round

Operation:
    D+-S1*S2+r -> D     (parallel move)

Assembler Syntax:
    MACR    (+-)S1,S2,D (parallel move)

Description:
    Multiply the two signed 24-bit source operands S1 and S2,
add/subtract the product to/from the specified 56-bit destination
accumulator D, and then round the result using convergent rounding.
The rounded result is stored in the destination accumulator D. The "-"
sign option is used to negate the specified product prior to
accumulation. The default sign option is "+". The contribution of the
LS bits of the result is rounded into the upper portion of the
destination accumulator (A1 or B1) by adding a constant to the LS bits
of the lower portion of the accumulator (A0 or B0). The value of the
constant added is determined by the scaling mode bits S0 and S1 in the
RS. Once rounding has been completed, the LS bits of the destination
accumulator D (A0 orB0) are loaded with zeros to maintain an unbiased
accumulator value which may be refused by next instruction. The upper
portion of the accumulator (A1 or B1) contains the rounded result
which may be read out to the data buses. Refer to the RND instruction
for more complete information on the convergent rounding process.

Example:
    MACR X0,Y0,B    B,X0 Y:(R4)+N4,Y0   ;X0*Y0+B->B, rnd B, update X0,Y0,R4

    Before Execution:
        X0 = $123456
        Y0 = $123456
        B  = $00:100000:000000

    After Execution:
        X0 = $100000
        Y0 = $987654
        B  = $00:1296CE:000000

Explanation of Example:
    Prior to execution, the 24-bit X0 register contains the value
$123456 (0.142222166), the 24-bit Y0 regsiter contains the value
$123456 (0.142222166), and the 56-bit accumulator contains the value
$00:100000:000000 (0.125). The execution of the MACR X0,Y0,B
instruction multiples the 24-bit signed value in the X0 register
by the 24-bit signed value in the Y0 register, adds the resulting
product to the 56-bit B accumulator, rounds the result into the B1
portion of the accumulator, and then zeros the B0 portion of the
accumulator (X0*Y0+B = 0.145227144519197 approximately =
$00:1296CD:9619C8, which is rounded to the value $00:1296CE:000000 =
0.145227193832397 = B).

Condition Codes:

     15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |LF|**| T|**|S1|S0|I1|I0|**| L| E| U| N| Z| V| C|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |<-           MR         ->|<-       CCR      ->|

    L- Set if limiting (parallel move) or overflow has occured in result
    E- Set if the signed integer portion of A or B result is in use
    U- Set if A or B result is unnormlized
    N- Set if bit 55 of A or B result is set
    Z- Set if A or B result equals zero
    V- Set if overflow has occured in A or B result

NOTE: The definition of the E and U bits varies according
to the scaling mode being used.

Instruction Format:
    MACR    (+-)S1,S2,D

    S1 = (X0,Y0,X1,Y1)
    S2 = (X0,Y0,X1,Y1)
    D  = (A,B)

Timing:     2 + mv oscillator clock cycles

Memory:     1 + mv program words